Vasileios Leon holds a Diploma Degree in Computer Engineering from the University of Patras, Greece, and is currently a PhD candidate & researcher at the National Technical University of Athens, Greece. His research interests include digital circuit design, hardware accelerators, embedded systems, HW/SW co-design, reconfigurable architectures, approximate computing, computer arithmetic, digital signal processing.
He has participated in the following research projects of the European Space Agency:
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QUEENS1 (4000119331/17/NL/PS), “Quality Evaluation of European New SW for BRAVE FPGA”,
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LEOTOME (4000126083/18/NL/FE), “Demonstration of Visual Based Navigation Algorithms on Myriad2 Processor”.
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QUEENS2 (4000128041/19/NL/AR/va), “Quality Evaluation of European New SW for BRAVE FPGA”
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HPCB (AO/1-9440/18/NL/AF), “FPGA Accelerated DSP Payload Data Processor Board”.
He has published more than 10 research papers in international peer-reviewed conferences and journals (including first authorship in 3 IEEE and ACM Transactions journals and 1 DAC conference paper).
He has also served as a laboratory assistant in undergraduate courses (“Microprocessors Laboratory”, “Digital VLSI Systems”, “Introduction to VLSI”), as well as co-supervised several undergraduate diploma theses.
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Walking through the Energy-Error Pareto Frontier of Approximate Multipliers
IEEE Micro DOI: 10.1109/MM.2018.043191124 -
Energy-efficient VLSI implementation of multipliers with double LSB operands
IET Circuits, Devices and Systems, 2019, DOI: 10.1049/iet-cds.2018.5039 -
Approximate Hybrid High Radix Encoding for Energy-Efficient Inexact Multipliers
IEEE Transactions On Very Large Scale Integration (VLSI) Systems, 26 (3), 2018 DOI: 10.1109/TVLSI.2017.2767858
Journals
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Efficient support vector machines implementation on Intel/Movidius Myriad 2
2018 7th International Conference on Modern Circuits and Systems Technologies, MOCAST 2018 DOI: 10.1109/MOCAST.2018.8376630 -
- Konstantinos Maragos ,
- Vasileios Leon ,
- George Lentaris ,
- Dimitrios Soudris ,
- David Gonzalez-Arjona ,
- R. Domingo ,
- A. Pastor ,
- D. M. Codinachs and
- I. Conway
Evaluation Methodology and Reconfiguration Tests on the New European NG-MEDIUM FPGA
2018 NASA/ESA Conference on Adaptive Hardware and Systems, AHS 2018, DOI: 10.1109/AHS.2018.8541492 -
- S. Mouselinos ,
- Vasileios Leon ,
- Sotirios Xydis ,
- Dimitrios Soudris and
- Kiamal Pekmestzi
TF2FPGA: A Framework for Projecting and Accelerating Tensorflow CNNs on FPGA Platforms
2019 8th International Conference on Modern Circuits and Systems Technologies, MOCAST 2019, DOI: 10.1109/MOCAST.2019.8741940 -
- Vasileios Leon ,
- K. Asimakopoulos ,
- Sotirios Xydis ,
- Dimitrios Soudris and
- Kiamal Pekmestzi
Cooperative arithmetic-aware approximation techniques for energy-efficient multipliers
Proceedings - Design Automation Conference, 2019, DOI: 10.1145/3316781.3317793 -
- George Lentaris ,
- G. Chatzitsompanis ,
- Vasileios Leon ,
- Kiamal Pekmestzi and
- Dimitrios Soudris
Combining arithmetic approximation techniques for improved CNN circuit design
ICECS 2020 - 27th IEEE International Conference on Electronics, Circuits and Systems, Proceedings, DOI: 10.1109/ICECS49266.2020.9294869
Conferences
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Implementation of Approximate Convolutional Filters and Floating-Point Components for CNN Applications
Academic Advisors: Kiamal Pekmestzi and Vasileios LeonBrief: PDF -
Customized Redundancy Schemes for Improved Fault-Tolerance of FPGAs in Space Applications
Brief: PDF -
Application of Approximate Computing Techniques on the NVIDIA Deep Learning Accelerator (NVDLA)
Brief: PDF
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Implementation of Approximate Convolutional Filters and Floating-Point Components for CNN Applications
Academic Advisors: Kiamal Pekmestzi and Vasileios LeonBrief: PDF -
Customized Redundancy Schemes for Improved Fault-Tolerance of FPGAs in Space Applications
Brief: PDF -
Application of Approximate Computing Techniques on the NVIDIA Deep Learning Accelerator (NVDLA)
Brief: PDF