Georgios Zervakis
Postdoctoral Researcher
9 Heroon Polytechneiou, Zographou Campus
Dr. Georgios Zervakis received the Diploma and the Ph.D. degree from the Department of Electrical and Computer Engineering, National Technical University of Athens (NTUA), Greece, in 2012 and 2018, respectively. Currently, he is a Research Associate at ICCS and Aristotle University of Thessaloniki (AUTH) and a Post-Doctoral Research Fellow at Microprocessors Laboratory and Digital Systems Lab (Microlab), School of Electrical and Computer Engineering of NTUA. Moreover, during his Ph.D. studies he served as a teaching assistant as well as systems and network administrator at Microlab. His research interests include approximate computing, hardware acceleration, low-power design, VLSI arithmetic circuits, and integration of hardware acceleration at cloud computing. He has published over 20 technical and research papers in scientific books and peer reviewed international journals and conferences. He has worked in several European projects including AEGLE, FABSPACE 2.0, and EXA2PRO.
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- Christoforos Kachris ,
- Elias Koromilas ,
- G. Stamelos ,
- Georgios Zervakis ,
- Sotirios Xydis and
- Dimitrios Soudris
“Energy-efficient acceleration of Spark Machine Learning applications on FPGAs,” pp. 91-109, Book Chapter in Christoforos Kachris, Babak Falsafi and Dimitrios Soudris, “Hardware Accelerators in Data Centers”
Springer Publishers, 2018. DOI: 10.1007/978-3-319-92792-3
Book Chapters
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- Giorgos Armeniakos ,
- Georgios Zervakis ,
- Dimitrios Soudris and
- Joerg Henkel
Hardware Approximate Techniques for Deep Neural Network Accelerators: A Survey
ACM Computing Surveys (CSUR) -
Walking through the Energy-Error Pareto Frontier of Approximate Multipliers
IEEE Micro DOI: 10.1109/MM.2018.043191124 -
Multi-Level Approximate Accelerator Synthesis under Voltage Island Constraints
IEEE Transactions on Circuits and Systems II: Express Briefs, 2019, DOI: 10.1109/TCSII.2018.2869025 -
- Georgios Zervakis ,
- Fotios Ntouskas ,
- Sotirios Xydis ,
- Dimitrios Soudris and
- Kiamal Pekmestzi
VOSsim: A Framework for Enabling Fast Voltage Over-Scaling Simulation for Approximate Computing Circuits
IEEE Transactions on Very Large Scale Integration Systems, Volume: 26, Issue: 6, June 2018 DOI: 10.1109/TVLSI.2018.2803202 -
Approximate Hybrid High Radix Encoding for Energy-Efficient Inexact Multipliers
IEEE Transactions On Very Large Scale Integration (VLSI) Systems, 26 (3), 2018 DOI: 10.1109/TVLSI.2017.2767858 -
- Georgios Zervakis ,
- Kostas Tsoumanis ,
- Sotirios Xydis ,
- Dimitrios Soudris and
- Kiamal Pekmestzi
DesignEfficient Approximate Multiplication Circuits Through Partial Product Perforation
IEEE Transactions on Very Large Scale Integration Systems (VLSI), 2016
Journals
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- Giorgos Armeniakos ,
- Georgios Zervakis ,
- Dimitrios Soudris ,
- Mehdi B. Tahoori and
- Joerg Henkel
Cross-layer approximation for printed machine learning circuits
2022 Design, Automation & Test in Europe Conference & Exhibition (DATE), 190-195 -
- Dimosthenis Masouros ,
- Konstantina Koliogeorgi ,
- Georgios Zervakis ,
- A. Kosvyra ,
- A. Chytas ,
- Sotirios Xydis ,
- Ioanna Chouvarda and
- Dimitrios Soudris
Co-design Implications of Cost-effective On-demand Acceleration for Cloud Healthcare Analytics: The AEGLE approach
Proceedings of the 2019 Design, Automation and Test in Europe Conference and Exhibition, DATE 2019, DOI: 10.23919/DATE.2019.8714934 -
- Konstantina Koliogeorgi ,
- Dimosthenis Masouros ,
- Georgios Zervakis ,
- Sotirios Xydis ,
- Tobias Becker ,
- Georgi Gaydajiev and
- Dimitrios Soudris
AEGLE’s Cloud Infrastructure for Resource Monitoring and Containerized Accelerated Analytics
in IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 2017 DOI: 10.1109/ISVLSI.2017.70 -
Multi-Level Approximation for Inexact Accelerator Synthesis Under Voltage Island Constraints
in Workshop on Approximate Computing, 2016 -
Performance-Power Exploration of Software-Defined Big Data Analytics: The AEGLE Cloud Backend
in International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS), 2016 -
- Nikolaos Eftaxiopoulos Sarris ,
- N. Axelos ,
- Georgios Zervakis ,
- Kostas Tsoumanis and
- Kiamal Pekmestzi
Delta DICE: A Double Node Upset resilient latch
IEEE 58th International Midwest Symposium on Circuits and Systems (MWSCAS), Pages 1-4, 2-5 Aug. 2015 -
- Georgios Zervakis ,
- Nikolaos Eftaxiopoulos Sarris ,
- Kostas Tsoumanis ,
- N. Axelos and
- Kiamal Pekmestzi
A segmentation-based BISR scheme
19th Asia and South Pacific Design Automation Conference (ASP-DAC), Pages 652-657, 20-23 Jan. 2014 -
- N. Axelos ,
- Nikolaos Eftaxiopoulos Sarris ,
- Georgios Zervakis ,
- Kostas Tsoumanis and
- Kiamal Pekmestzi
FF-DICE: An 8T soft-error tolerant cell using Independent Dual Gate SOI FinFETs
IEEE 20th International On-Line Testing Symposium (IOLTS), Pages 200-201, 7-9 Jul. 2014 -
- Nikolaos Eftaxiopoulos Sarris ,
- N. Axelos ,
- Georgios Zervakis ,
- Kostas Tsoumanis and
- Kiamal Pekmestzi
An independent dual gate SOI FinFET soft-error resilient memory cell
9th International Design & Test Symposium (IDT), Pages 39-44, 16-18 Dec. 2014 -
- Georgios Zervakis ,
- Nikolaos Eftaxiopoulos Sarris ,
- Kostas Tsoumanis ,
- N. Axelos and
- Kiamal Pekmestzi
A high radix montgomery multiplier with concurrent error detection
9th International Design & Test Symposium (IDT), Pages 199-204, 16-18 Dec. 2014 -
- Nikolaos Eftaxiopoulos Sarris ,
- Georgios Zervakis ,
- Kiamal Pekmestzi and
- Costas Efstathiou
High performance MAC designs
9th International Design & Test Symposium (IDT), Pages 30-35, 16-18 Dec. 2014 -
- Nikolaos Eftaxiopoulos Sarris ,
- Georgios Zervakis ,
- Kostas Tsoumanis and
- Kiamal Pekmestzi
A radiation tolerant and self-repair memory cell
IEEE 19th International On-Line Testing Symposium (IOLTS), Pages 210-215, 8-10 Jul. 2013