Aggelos Ferikoglou

Ph.D. Student

aferikoglou@microlab.ntua.gr

9 Heroon Polytechneiou, Zographou Campus

Aggelos Ferikoglou has received his Diploma from the Department of Electrical and Computer Engineering, National Technical University of Athens (NTUA), Greece, in 2020. Currently, he is a PhD student at Microprocessors Laboratory and Digital Systems Lab (Microlab), School of Electrical and Computer Engineering of NTUA. During his Ph.D. studies he works as a teaching assistant on undergraduate courses. His research interests include resource management on cloud infrastructures and hardware acceleration using high-level synthesis. He is currently working in Aristotle University of Thessaloniki (AUTH) as research associate.

Building FPGA QoR models from a GitHub based HLS knowledge base

Academic Advisors: Aggelos Ferikoglou , Dimosthenis Masouros , Sotirios Xydis and Dimitrios Soudris

Brief: PDF

Machine learning based design space exploration for FPGA kernel acceleration

Academic Advisors: Aggelos Ferikoglou , Dimosthenis Masouros and Dimitrios Soudris

Brief: PDF

Improving inference engine GPU colocation using DNN based predictive monitoring

Academic Advisors: Aggelos Ferikoglou , Dimosthenis Masouros , Sotirios Xydis and Dimitrios Soudris

Brief: PDF

Building FPGA QoR models from a GitHub based HLS knowledge base

Academic Advisors: Aggelos Ferikoglou , Dimosthenis Masouros , Sotirios Xydis and Dimitrios Soudris

Brief: PDF

Machine learning based design space exploration for FPGA kernel acceleration

Academic Advisors: Aggelos Ferikoglou , Dimosthenis Masouros and Dimitrios Soudris

Brief: PDF

Improving inference engine GPU colocation using DNN based predictive monitoring

Academic Advisors: Aggelos Ferikoglou , Dimosthenis Masouros , Sotirios Xydis and Dimitrios Soudris

Brief: PDF

Academics

Building FPGA QoR models from a GitHub based HLS knowledge base

Machine learning based design space exploration for FPGA kernel acceleration

Improving inference engine GPU colocation using DNN based predictive monitoring

Building FPGA QoR models from a GitHub based HLS knowledge base

Machine learning based design space exploration for FPGA kernel acceleration

Improving inference engine GPU colocation using DNN based predictive monitoring